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Shift the right half's top two rows: 6 and F6 lead the right hand

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Resolves the ragged outer edge on both halves at once. Left drops to 34 keys
in six columns each five deep, with no orphans. Right goes to 41: six full
columns, then F12/=/]/Enter, then Bksp and backslash sharing the outer pinky
column instead of backslash sitting alone two columns out.

Co-Authored-By: Claude Opus 5 <[email protected]>
This commit is contained in:
William RickertandClaude Opus 5 committed 2026-08-27 15:09:21 -05:00
1 parent 13c5ca5d5d
commit 5e527bb7b9
4 files changed
+114 -118
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docs/bom.csv
+4 -4
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@@ -16,8 +16,8 @@ ALL,MCU,R1-R2,2,22R 0402,FRC0402F22R0TS,C2929994,0402,Extended,0.0007,"USB D+/D-
ALL,MCU,R3-R4,2,5.1k 0402,JLC basic library,-,0402,Basic,0.002,"USB-C CC1/CC2 pull-DOWN (Rd - device side)"
ALL,MCU,R5,1,1.5k 0402,JLC basic library,-,0402,Basic,0.002,"*** SWAP-DEPENDENT *** D+ pull-up. POPULATE for STM32F103. DNF for CH32L103 (internal 1.5k via RB_UC_DEV_PU_EN)"
ALL,MCU,R6-R7,2,10k 0402,FRC0402F1002TS,C25744,0402,Basic,0.003,"BOOT0 pulldown, BOOT1/PB2 pulldown"
HALF-L,Matrix,D1-D36,36,1N4148W,1N4148W,C81598,SOD-123,Basic,0.011,"Left half: 36 keys"
HALF-R,Matrix,D1-D39,39,1N4148W,1N4148W,C81598,SOD-123,Basic,0.011,"Right half: 39 keys"
HALF-L,Matrix,D1-D34,34,1N4148W,1N4148W,C81598,SOD-123,Basic,0.011,"Left half: 34 keys, six clean columns"
HALF-R,Matrix,D1-D41,41,1N4148W,1N4148W,C81598,SOD-123,Basic,0.011,"Right half: 41 keys"
HALF-L/R,Split,R14,1,100R 0402,JLC basic library,-,0402,Basic,0.002,"Series on the SBU net between connector and MCU USART pin"
HALF-L/R,Split,D-ESD,1,ESD 5V bidirectional,PESD5V0S1BA,C2827694,SOD-323,Extended,0.036,"On the SBU net - user-exposed signal going to a GPIO"
HALF-L/R,Split,J3,1,3-pin header DNF,JST SH,-,-,Consigned,0.02,"*** DNF INSURANCE *** VCC/GND/DATA fallback if SBU proves flaky (bad cables). 3 pads cost nothing"
@@ -36,8 +36,8 @@ NUMPAD,Hub,U8-U10,3,Ideal diode / OCP,CH213K,C5456874,SOT-23-3,Extended,0.073,"V
NUMPAD,Hub,R8-R13,6,56k 0402,FRC0402F5602TS,C2906875,0402,Extended,0.0018,"Rp pull-UPS on CC1/CC2 of each downstream port - host side. NOT 5.1k"
NUMPAD,SBU,-,-,SBU PASS-THROUGH,-,-,-,-,0.00,"*** Passive trace *** Tie SBU1+SBU2 on J5 (left half) and on J6 (right half), then connect the two nets together. Carries QMK split_common UART between the halves. Numpad MCU does NOT touch this net"
NUMPAD,SBU,D-ESD2,2,ESD 5V bidirectional,PESD5V0S1BA,C2827694,SOD-323,Extended,0.036,"One per half-port SBU net"
HALF-L,Switches,SW-,36,MX hotswap socket,CPG151101S11,C41430893,SMD 14.5x5.9mm,Extended,0.037,"BOTTOM SIDE. Alt: C49352235"
HALF-R,Switches,SW-,39,MX hotswap socket,CPG151101S11,C41430893,SMD 14.5x5.9mm,Extended,0.037,"BOTTOM SIDE. Alt: C49352235"
HALF-L,Switches,SW-,34,MX hotswap socket,CPG151101S11,C41430893,SMD 14.5x5.9mm,Extended,0.037,"BOTTOM SIDE. Alt: C49352235"
HALF-R,Switches,SW-,41,MX hotswap socket,CPG151101S11,C41430893,SMD 14.5x5.9mm,Extended,0.037,"BOTTOM SIDE. Alt: C49352235"
NUMPAD,Switches,SW-,25,MX hotswap socket,CPG151101S11,C41430893,SMD 14.5x5.9mm,Extended,0.037,"One per key. BOTTOM SIDE"
NOTE,Assembly,-,-,SINGLE-SIDED,-,-,-,-,-,"Put ALL SMD on the BOTTOM: sockets, MCU, passives, diodes, and any reverse-mount SK6812MINI-E. Top face bare except switch holes. Keeps JLC to one assembly pass"
NOTE,Mechanical,-,-,PLATE REQUIRED,-,-,-,-,-,"Hotswap needs a switch plate or socket pads tear off during switch insertion. FR4 plate = just another JLC board"
1 Board Section Ref Qty Value MPN LCSC Package JLC Unit USD Notes
16 ALL MCU R3-R4 2 5.1k 0402 JLC basic library - 0402 Basic 0.002 USB-C CC1/CC2 pull-DOWN (Rd - device side)
17 ALL MCU R5 1 1.5k 0402 JLC basic library - 0402 Basic 0.002 *** SWAP-DEPENDENT *** D+ pull-up. POPULATE for STM32F103. DNF for CH32L103 (internal 1.5k via RB_UC_DEV_PU_EN)
18 ALL MCU R6-R7 2 10k 0402 FRC0402F1002TS C25744 0402 Basic 0.003 BOOT0 pulldown, BOOT1/PB2 pulldown
19 HALF-L Matrix D1-D36 D1-D34 36 34 1N4148W 1N4148W C81598 SOD-123 Basic 0.011 Left half: 36 keys Left half: 34 keys, six clean columns
20 HALF-R Matrix D1-D39 D1-D41 39 41 1N4148W 1N4148W C81598 SOD-123 Basic 0.011 Right half: 39 keys Right half: 41 keys
21 HALF-L/R Split R14 1 100R 0402 JLC basic library - 0402 Basic 0.002 Series on the SBU net between connector and MCU USART pin
22 HALF-L/R Split D-ESD 1 ESD 5V bidirectional PESD5V0S1BA C2827694 SOD-323 Extended 0.036 On the SBU net - user-exposed signal going to a GPIO
23 HALF-L/R Split J3 1 3-pin header DNF JST SH - - Consigned 0.02 *** DNF INSURANCE *** VCC/GND/DATA fallback if SBU proves flaky (bad cables). 3 pads cost nothing
36 NUMPAD Hub R8-R13 6 56k 0402 FRC0402F5602TS C2906875 0402 Extended 0.0018 Rp pull-UPS on CC1/CC2 of each downstream port - host side. NOT 5.1k
37 NUMPAD SBU - - SBU PASS-THROUGH - - - - 0.00 *** Passive trace *** Tie SBU1+SBU2 on J5 (left half) and on J6 (right half), then connect the two nets together. Carries QMK split_common UART between the halves. Numpad MCU does NOT touch this net
38 NUMPAD SBU D-ESD2 2 ESD 5V bidirectional PESD5V0S1BA C2827694 SOD-323 Extended 0.036 One per half-port SBU net
39 HALF-L Switches SW- 36 34 MX hotswap socket CPG151101S11 C41430893 SMD 14.5x5.9mm Extended 0.037 BOTTOM SIDE. Alt: C49352235
40 HALF-R Switches SW- 39 41 MX hotswap socket CPG151101S11 C41430893 SMD 14.5x5.9mm Extended 0.037 BOTTOM SIDE. Alt: C49352235
41 NUMPAD Switches SW- 25 MX hotswap socket CPG151101S11 C41430893 SMD 14.5x5.9mm Extended 0.037 One per key. BOTTOM SIDE
42 NOTE Assembly - - SINGLE-SIDED - - - - - Put ALL SMD on the BOTTOM: sockets, MCU, passives, diodes, and any reverse-mount SK6812MINI-E. Top face bare except switch holes. Keeps JLC to one assembly pass
43 NOTE Mechanical - - PLATE REQUIRED - - - - - Hotswap needs a switch plate or socket pads tear off during switch insertion. FR4 plate = just another JLC board